1. Field of the Invention
The present invention relates to an organic light emitting display device, and more particularly, to an organic light emitting display device that minimizes non-uniform luminance due to the drop of a voltage caused by a line resistance, and facilitates the supply of high-level power and low-level power.
2. Discussion of the Related Art
With the advance of multimedia, the importance of flat panel display (FPD) devices is increasing recently. Therefore, various FPD devices such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, and organic light emitting display devices are being used practically. In such FPD devices, the organic light emitting display devices having a self-emission type have a fast response time, low power consumption, high resolution, and an large screen, and thus are attracting much attention as next-generation FPD devices.
Generally, as illustrated in FIG. 1, a related art organic light emitting display device includes a display panel 10, a plurality of gate drivers 20, a plurality of data drivers 30, a plurality of flexible circuit films 40 for supplying power, and a printed circuit board (PCB) 50.
The display panel 10 includes a first substrate 12 including a plurality of pixels P and a cathode electrode layer CE, and a second substrate 14 facing-coupled to the first substrate 12.
The plurality of pixels P are respectively formed in a plurality of pixel areas defined by intersections between a plurality of gate lines and a plurality of data lines DL that are formed on the first substrate 12 to intersect. Each of the pixels P includes a pixel circuit PC and an emission cell EL.
The pixel circuit PC is connected to a gate line GL, a data line DL, and a high-level power line PL. The pixel circuit PC supplies a data current, corresponding to a data signal supplied to the data line DL, to an emission cell EL in response to a gate signal supplied to the gate line GL. For example, the pixel circuit PC includes a switching thin film transistor T1, a driving thin film transistor T2, and a capacitor C.
The switching thin film transistor T1 is switched on according to the gate signal supplied to the gate line GL, and supplies a data voltage, supplied from the data line DL, to the driving thin film transistor T2. The driving thin film transistor T is switched on with the data voltage supplied from the switching thin film transistor T1, generates a data current corresponding to the data voltage, and supplies the data current to the emission cell EL. The capacitor C holds the data voltage supplied to the driving thin film transistor T2, during one frame.
The emission cell EL includes an anode electrode (not shown) connected to the pixel circuit PC, and an organic layer (not shown) formed on the anode electrode and the cathode electrode layer CE. Here, the organic layer may be formed to have a structure of a hole transport layer/organic emission layer/electron transport layer or a structure of a hole injection layer/hole transport layer/organic emission layer/electron transport layer/electron injection layer. Furthermore, the organic layer may further include a function layer for enhancing the emission efficiency and/or service life of the organic emission layer.
The cathode electrode layer CE is formed to cover an entire area except an edge of the first substrate 12, and connected to the emission cell EL of each pixel P. The cathode electrode layer CE receives low-level power from the flexible circuit film 50 for supplying power.
A plurality of data pad parts (not shown), a plurality of gate pad parts (not shown), and a plurality of power supply pad parts (not shown) are prepared in an inactive area of the first substrate 12.
Each of the data pad parts includes a plurality of data pads respectively connected to the data lines DL.
Each of the gate pad parts includes a plurality of gate pads respectively connected to the gate lines DL.
Each of the power supply pad parts includes a plurality of high-level power pads respectively connected to the high-level power lines PL, and a plurality of low-level power pads connected to the cathode electrode layer CE. Each of the power supply pad parts is disposed between adjacent data pad parts.
The second substrate 14 is formed of glass or metal in a plate shape, and facing-coupled to the first substrate 12, thereby protecting the emission cell EL of each pixel P (formed in the first substrate 12) from moisture, oxygen, etc. In this case, the second substrate 14 is adhered to an inactive area of the first substrate 12 by a sealing member (not shown) that is formed to surround an active area of the first substrate 12 including the plurality of pixels P.
Each of the gate drivers 20 is connected to a corresponding gate pad part among the gate pad parts formed in a left or right inactive area of the first substrate 12, and supplies the gate signal to a corresponding gate line GL through the gate pad of the corresponding gate pad part. To this end, each of the gate drivers 20 includes a gate flexible circuit film 22 adhered to a corresponding gate pad part, and a gate driving integrated circuit (IC) 24 that is mounted on the gate flexible circuit film 22, generates the gate signal, and supplies the gate signal to a corresponding gate line GL through the gate flexible circuit film 22 and a corresponding gate pad.
Each of the data drivers 30 is connected to a corresponding data pad part among the data pad parts formed in an upper inactive area of the first substrate 12, and supplies a data signal to a corresponding data line DL through the data pad of the corresponding data pad part. To this end, each of the data drivers 30 includes a data flexible circuit film 32 adhered to a corresponding data pad part, and a data driving IC 34 that is mounted on the data flexible circuit film 32, generates the data signal, and supplies the data signal to a corresponding data line DL through the data flexible circuit film 32 and a corresponding data pad.
Each of the flexible circuit films 40 for supplying power is connected to a corresponding power supply pad part among the power supply pad parts formed in the upper inactive area of the first substrate 12, and disposed between adjacent data pad parts. Each of the flexible circuit films 40 supplies high-level power to a corresponding high-level power line PL through a high-level power pad of a corresponding power supply pad part, and supplies low-level power to the cathode electrode layer CE through a low-level power pad of the corresponding power supply pad part.
The PCB 50 is connected to the data driver 30 and the flexible circuit films 40 for supplying power, supplies digital input data to the data driver 30, and supplies the high-level power and the low-level power to the flexible circuit films 40.
In the related art organic light emitting display device, since the high-level power and the low-level power are supplied through the power supply pad parts prepared at an upper side of the display panel 10, a voltage decreases progressively closer from an upper side to a lower side of the display panel 10 due to the drop of a voltage (IR drop) caused by a line resistance, causing non-uniform luminance.
Furthermore, as the related art organic light emitting display device becomes higher in resolution, when the display panel 10 has super high resolution, the number of data lines DL, the number of gate lines GL, and the number of high-level power lines PL increase by two times. Due to this reason, the power supply pad part cannot be disposed in a space between adjacent data drivers 30, and thus, it is impossible to supply the high-level power and the low-level power through the flexible circuit film 40.
The above-described background is possessed by the inventor of the application for deriving the invention, or is technology information that has been acquired in deriving the invention. The above-described background is not necessarily known technology disclosed to the general public before the application of the invention.